Charge & Discharge Battery Management Circuit


(This is part 2 of the ESOLA series of posts. For a complete table of contents of the ESOLA posts, see the first in the series. This represents work in progress now.)


Now that the battery pack is done, the next step is to design the battery management system. To recapitulate, the overall project consists of a 7.5V (five NiMH batteries in series, four sets in parallel) battery powered unit at the end of a 75 foot long coaxial cable. The battery recharges from current sent from a power supply at the near end of the cable. The plan is that the unit will only be set to recharge when not in use, since recharging inserts unwanted RF noise into the system. The main consideration is to protect the batteries. This means:

  • Prevent them from discharging too far, say below about 5.5 V.
  • Prevent them from charging to too high a voltage, about 7.4 V
  • Prevent them from charging at too high a rate, about 600 ma per battery.

The first design used transistor pairs to make the battery management circuit, and I said “the battery management circuitry is unnecessarily complicated. I designed it using discrete parts because that’s what I had on hand, but there are better approaches using linear ICs. Do me a favor and redesign it yourself, and send me an update.” But of course no one did my work for me, so I did the redesign myself, replacing the transistor pairs with a dual Rail-to-rail FET input Opamp, the TLC2272. I’ll just consider that a note from my past self to my future self. Get to work, future self!

A key change from the original design was that I determined that strict regulation of the low noise amplifier was unnecessary so this approach would run the circuit directly from the battery voltage. That saved some circuitry, and improved the efficiency overall too. Another change was the plan to use a higher current input amplifier that would need 250-500 ma, so much more battery capacity would be needed. That lead to the battery being 20 NiMH instead of just 5.

As before, the circuit was first designed in LTSpice, which allowed quick experimentation and choice of resistor values. Below is the simulation schematic (NOT the actual parts, just idealized models). V4 is the charging voltage, which is regulated by P-channel FET M1. The load is represented by R8, and M2 is the p channel FET which disconnects the battery when it is discharged too far. The battery is represented by a giant capacitor, which acts like a charging battery, C1, a quarter of a Farad. The voltage reference (LM4041) is V1. R5 and R11 are 1K pots. Charging current passes through R2, and if the voltage across R2 exceeds the Vbe of Q1 the transistor turns on and shuts off M1, limiting the charge current to 0.6/.27=2.2 amps. If the battery overcharges, U1 pulls current through R6, turning on Q1 and stopping the charging.

In the simulation, the battery starts at about 4.7V, and the charging voltage comes on, and the battery charges at a steady rate of 2.2A until it reaches the voltage of about 6.8 Volts. In the meantime, the load is switched on once the battery goes over 5V, and then shuts off again once the battery discharges below that point again. The key battery voltages are set by the pots.

The full LTSpice listing is at the end of this article. The schematic, as built, is below. It was updated to Rev B on June 23, 2022. (Click on it to enlarge.)

Testing it, it seemed to work about as intended. When charging starts, supplying 12V to the charge circuit charges the battery with about 2A, until the voltage rises near the charge limit set by R16. At that point (7.2V was what I set it to) the voltage on the battery still rises very slowly, with the charge current dropping more and more, until it is just a trickle. If the unit is on and the load connected, if the unit is fully charged the charge current equals the load current. If the charge current is removed, the load stays connected until the battery discharges to about 5.8V, at which point it shuts down, leaving the battery with a minimum charge remaining. The setting for the overcharge level did not quite equal what I had figured, but it was at least in range, so I didn’t make any changes. The discharge setting pot seemed right on. Below, a photo of the unit being tested. The small light bulb at the top center is the temporary “load”.

This photo below shows the partly-assembled battery management circuit with the power devices. Note that the charge limiting transistor is attached to a brass plate which is tightly mounted to the plastic box. My intent there is that heat is conducted thru the plastic. This gets fairly hot, but so far, not TOO hot. I may need to test this some more.

Here is the LTSpice listing of the simulation. Copy the text and save it as a text file with the extension “.asc” and open it with LTSpice.exe.

Version 4
SHEET 1 3816 1912
WIRE -256 -224 -320 -224
WIRE -80 -224 -176 -224
WIRE 224 -224 -80 -224
WIRE 480 -224 224 -224
WIRE 656 -224 480 -224
WIRE 656 -192 656 -224
WIRE -80 -112 -80 -224
WIRE 352 -64 -16 -64
WIRE 528 -64 352 -64
WIRE 656 -64 656 -112
WIRE 656 -64 608 -64
WIRE 352 -16 352 -64
WIRE 480 0 480 -224
WIRE 656 160 656 -64
WIRE -80 176 -80 -16
WIRE 480 176 480 64
WIRE 480 176 -80 176
WIRE 608 176 480 176
WIRE 352 208 352 64
WIRE 656 288 656 256
WIRE 816 288 656 288
WIRE 656 368 656 288
WIRE 816 368 816 288
WIRE 656 496 656 448
WIRE 816 496 816 432
WIRE 816 496 656 496
WIRE 656 560 656 496
WIRE 656 560 32 560
WIRE 784 560 656 560
WIRE 928 560 784 560
WIRE 1008 560 928 560
WIRE 1088 560 1008 560
WIRE 1264 560 1088 560
WIRE 352 624 352 400
WIRE 352 624 288 624
WIRE 32 640 32 560
WIRE 784 656 784 560
WIRE 1088 656 1088 560
WIRE 352 672 352 624
WIRE 1008 672 1008 560
WIRE 1008 768 1008 736
WIRE 1088 768 1088 736
WIRE 1088 768 1008 768
WIRE 1216 768 1088 768
WIRE 352 800 352 736
WIRE 1088 816 1088 768
WIRE 1264 816 1264 560
WIRE 224 832 224 -224
WIRE 1216 832 1216 768
WIRE 32 848 32 720
WIRE 192 848 32 848
WIRE 288 864 288 624
WIRE 288 864 256 864
WIRE 192 880 144 880
WIRE 32 928 32 848
WIRE 352 928 352 880
WIRE 352 928 32 928
WIRE 1088 960 1088 896
WIRE 32 976 32 928
WIRE 144 976 144 880
WIRE 528 976 144 976
WIRE 704 976 528 976
WIRE 928 976 928 560
WIRE 784 992 784 736
WIRE 896 992 784 992
WIRE 784 1008 784 992
WIRE 1008 1008 960 1008
WIRE 896 1024 880 1024
WIRE -80 1088 -80 176
WIRE 32 1104 32 1056
WIRE 704 1104 704 976
WIRE 880 1104 880 1024
WIRE 880 1104 704 1104
WIRE 1264 1120 1264 912
WIRE 528 1136 528 976
WIRE 656 1136 656 560
WIRE 784 1136 784 1088
WIRE -320 1152 -320 -224
WIRE 1008 1216 1008 1008
WIRE 1088 1216 1088 1152
WIRE 1088 1216 1008 1216
WIRE -320 1264 -320 1232
WIRE -80 1264 -80 1168
WIRE -80 1264 -320 1264
WIRE 32 1264 32 1184
WIRE 32 1264 -80 1264
WIRE 224 1264 224 896
WIRE 224 1264 32 1264
WIRE 528 1264 528 1216
WIRE 528 1264 224 1264
WIRE 656 1264 656 1200
WIRE 656 1264 528 1264
WIRE 784 1264 784 1216
WIRE 784 1264 656 1264
WIRE 928 1264 928 1040
WIRE 928 1264 784 1264
WIRE 1264 1264 1264 1200
WIRE 1264 1264 928 1264
WIRE -320 1312 -320 1264
FLAG -320 1312 0
SYMBOL voltage -320 1136 R0
WINDOW 3 -81 235 Left 2
WINDOW 123 -377 138 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PWL(0 5 .1 4 .12 5 .25 12 1.9 12 1.91 0 2 0)
SYMATTR InstName V4
SYMBOL res -272 -208 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R14
SYMATTR Value 1e-3
SYMBOL res -96 1072 R0
SYMATTR InstName R1
SYMATTR Value 10000
SYMBOL res 640 352 R0
SYMATTR InstName R4
SYMATTR Value 1000
SYMBOL pmos 608 256 M180
SYMATTR InstName M1
SYMATTR Value IRF9Z24S_L
SYMBOL res 640 -208 R0
SYMATTR InstName R2
SYMATTR Value .27
SYMBOL pnp -16 -16 R180
SYMATTR InstName Q1
SYMATTR Value 2N4403
SYMBOL res 624 -80 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 220
SYMBOL res 336 -32 R0
SYMATTR InstName R6
SYMATTR Value 100
SYMBOL cap 640 1136 R0
SYMATTR InstName C1
SYMATTR Value .25
SYMBOL diode 800 368 R0
SYMATTR InstName D2
SYMATTR Value MUR460
SYMBOL cap 464 0 R0
SYMATTR InstName C2
SYMATTR Value 1e-6
SYMBOL pmos 1216 912 M180
SYMATTR InstName M2
SYMATTR Value IRF9Z24S_L
SYMBOL res 1248 1104 R0
SYMATTR InstName R8
SYMATTR Value 15
SYMBOL res 1072 640 R0
SYMATTR InstName R9
SYMATTR Value 2200
SYMBOL res 768 640 R0
SYMATTR InstName R10
SYMATTR Value 10000
SYMBOL res 768 1120 R0
SYMATTR InstName R11
SYMATTR Value 883
SYMBOL cap 992 672 R0
SYMATTR InstName C3
SYMATTR Value .1e-6
SYMBOL res 768 992 R0
SYMATTR InstName R12
SYMATTR Value 2200
SYMBOL voltage 528 1120 R0
WINDOW 3 -37 196 Left 2
WINDOW 123 -377 138 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value 1.215
SYMATTR InstName V1
SYMBOL res 16 1088 R0
SYMATTR InstName R5
SYMATTR Value 883
SYMBOL res 16 960 R0
SYMATTR InstName R7
SYMATTR Value 3300
SYMBOL res 16 624 R0
SYMATTR InstName R16
SYMATTR Value 20000
SYMBOL OpAmps\UniversalOpamp2 928 1008 R0
SYMATTR InstName U2
SYMBOL res 1072 800 R0
SYMATTR InstName R13
SYMATTR Value 100
SYMBOL OpAmps\UniversalOpamp2 224 864 R0
SYMATTR InstName U1
SYMBOL diode 336 672 R0
SYMATTR InstName D1
SYMATTR Value MUR460
SYMBOL res 336 784 R0
SYMATTR InstName R15
SYMATTR Value 1e6
SYMBOL diode 336 208 R0
SYMATTR InstName D3
SYMATTR Value MUR460
SYMBOL diode 336 272 R0
SYMATTR InstName D4
SYMATTR Value MUR460
SYMBOL diode 336 336 R0
SYMATTR InstName D5
SYMATTR Value MUR460
SYMBOL diode 1072 960 R0
SYMATTR InstName D6
SYMATTR Value MUR460
SYMBOL diode 1072 1024 R0
SYMATTR InstName D7
SYMATTR Value MUR460
SYMBOL diode 1072 1088 R0
SYMATTR InstName D8
SYMATTR Value MUR460
TEXT -400 1456 Left 2 !.tran 5
TEXT 744 1312 Left 2 ;Pot 0-1K
TEXT 1336 1160 Left 5 ;Load
TEXT 808 1416 Left 3 ;1K Shutoff Adjust Pot\nmin 6.66\nmid 5.66\nmax 4.96
TEXT 8 1408 Left 3 ;500 ohm Vmax Adjust Pot\nmin 8.09\nmid 7.27\nmax 6.61
TEXT -400 1504 Left 2 !.include opamp.sub

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2 thoughts on “Charge & Discharge Battery Management Circuit

  1. Pingback: A Compact High Current AA Battery Pack For Mobile or Outdoor Applications | barbara4tech

  2. Pingback: Receive-only Loop Antenna with Wideband Amplifier (Part 1) | barbara4tech

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